1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a technique of replacing a defective memory cell with a redundant memory cell when a defect is caused during data programming.
2. Description of the Related Art
A semiconductor device such as a flash memory has a regular memory cell array and includes a redundant cell array as a backup circuit to be used when a defect is caused in the regular cell array. If an error occurs at the time of data programming or erasing, the defective memory cell is replaced with a redundant memory cell, so as to save data and increase production yield. In Japanese Unexamined Patent Publication No. 8-7597 (hereinafter referred to as Document 1), for example, the row address of a memory cell in which writing has not been properly completed is stored in a defective row address storage circuit. When the defective row address is input, a control circuit performs a control operation to select a redundant memory cell.
In Japanese Unexamined Patent Publication No. 2004-342187 (hereinafter referred to as Document 2), when an error in erasing is detected, relief information that associates the memory block in which the erasing error has occurred with a backup memory block is recorded. If access to a regular memory cell the memory block indicated in the relief information is detected, the access is switched from the regular memory block to the corresponding backup memory block.
Although there has been a conventional automatic redundancy technique by which reprogramming is performed to write data involved in failed programming into a redundant memory cell, a technique of securing data already written in sectors on which programming is to be performed has not been disclosed in the prior art. When an error occurs in a regular sector, a redundant sector is selected instead of the regular sector. Therefore, the already written data cannot be secured unless the data already written in the regular sector is moved to the redundant sector. The technique disclosed in Document 2 is a technique for data erasing, and data protection is not taken into consideration therein.